1. Field of the Invention
This invention relates to an electro-luminescence display (ELD), and more particularly to an electro-luminescence panel that is adaptive for displaying a gray scale of picture.
2. Description of the Related Art
Generally, an electro-luminescence (EL) panel converts an electrical signal into a light energy to thereby display a picture corresponding to video signals. As shown in FIG. 1, the EL panel includes gate line pairs GL and /GL and data lines DL arranged on a glass substrate 10 in such a manner to cross each other, and pixel elements PE arranged at each intersection between the gate line pairs GL and /GL and the data lines DL. Each pixel element PE is driven when gate signals are applied to the gate line pairs GL and /GL and generates a light corresponding to a magnitude of pixel signals applied to the data lines DL.
In order to drive such an EL panel, a gate driver 12 is connected to the gate line pairs GL and /GL while a data driver 14 is connected to the data lines DL. The gate driver 12 drives the gate line pairs GL and /GL sequentially. The data driver 14 applies pixel signals to the pixels PE via the data lines DL.
As shown in FIG. 2, each of the pixel elements RE driven with the gate driver 12 and the data driver 14 includes an EL cell ELC connected to a ground voltage line GNDL, and a cell driving circuit 16 for driving the EL cell ELC. The cell driving circuit 16 includes a first PMOS thin film transistor (TFT) MP1 connected among first and second nodes N1 and N2 and the EL cell ELC, a second PMOS TFT MP2 connected among a gate line GL, the second node N2 and the EL cell ELC, and a capacitor C1 connected between the first and second nodes N1 and N2.
The capacitor C1 charges a voltage of a pixel signal when the pixel signal is received from the data line DL and applies the charged pixel voltage to the gate electrode of the first PMOS TFT MP1. The first PMOS TFT MP1 is turned on by the pixel voltage charged in the first capacitor C1, to thereby apply a supply voltage VDD applied, via the first node N1, from a voltage supply line VDDL to the EL cell ELC. At this time, a channel width of the first PMOS TFT MP1 is varied depending on a voltage level of a pixel signal applied from the capacitor C1 to control an amount of a current applied to the EL cell ELC.
The EL cell ELC generates a light corresponding to a current amount applied from the first PMOS TFT MP1. The second PMOS TFT MP2 responds to a gate signal GLS, as shown in FIG. 3, applied from the gate line GL to selectively connect the second node N2 to the EL cell ELC. More specifically, the second PMOS TFT MP2 connects the second node N2 to the EL cell ELC at a time interval when the gate signal GLS is enabled at a low logic, to thereby charge the pixel signal into the capacitor C1.
In other words, the second PMOS TFT MP2 forms a current path of the first capacitor C1 at a time interval when the gate signal GLS at the gate line GL is enable. The capacitor C1 charges a pixel signal at said enabling interval of the gate signal GLS and applies the charge pixel signal to the gate electrode of the first PMOS TFT MP1. Thus, the first PMOS TFT MP1 controls its channel width depending on a voltage level of the pixel signal charged in the capacitor C1, to thereby determine a current amount flowing from the first node N1 into the EL cell ELC.
The cell driving circuit 16 further includes a third PMOS TFT MP3 responding to a gate signal GLS at the gate line GL, and a fourth PMOS TFT MP4 responding to an inverted gate signal /GLS from the gate bar line /GL. The third PMOS TFT MP3 is turned on by the gate signal GLS from the gate line GL, to thereby connect the capacitor C1 connected to the first node N1 and the drain electrode of the first PMOS TFT MP1 to the data line DL. In other words, the third PMOS TFT MP3 responds to a low logic of gate signal GLS to send a pixel signal at the data line DL to the first node N1.
The fourth PMOS TFT MP4 is turned on by an inverted gate signal /GLS from the gate bar line /GL, to thereby connects the first node N1 to which the capacitor C1 and the drain electrode of the first PMOS TFT MP1 have been connected to the voltage supply line VDDL. At a time interval when the fourth PMOS TFT MP4 has been turned on, a supply voltage VDD at the voltage supply line VDDL is applied, via the first node N1 and the first PMOS TFT MP1, to the EL cell ELC. The EL cell ELC generates a light corresponding to an amount of the supply voltage VDD from the voltage supply line VDDL.
Since the EL cell driving circuit 16 supplies a current amount of a pixel signal from the data line DL to the EL cell ELC as it is at a time interval when the gate signal GLS at the gate line GL is enabled at a low logic, the data driver should have a high capacity of current source. However, the data driver 14 fails to increase a maximum current amount to be supplied to the EL cells ELC for one line because it should drive pixel elements for one line simultaneously.
In other words, the conventional EL panel fails to increase a maximum current amount required for obtaining a maximum brightness, that is, a current margin of the pixel signal because it should apply a forward current signal to each pixel element. For this reason, a current difference between gray scale levels of a video signal is largely reduced into a value of approximately several xcexcA. If a current difference between the gray scale levels is set to several xcexcA, a data driver integrated circuit (IC) chip must have an ability to control a current at a range of several xcexcA accurately. However, it was very difficult to manufacture a data driver IC chip capable of controlling a current at a range of several xcexcA accurately. As a result, the conventional EL panel had a large difficulty in displaying a gray scale of picture.
Accordingly, it is an object of the present invention to provide an electro-luminescence panel that is adaptable for displaying a gray scale of a picture.
A further object of the present invention is to provide an electro-luminescence panel that is capable of applying a large current signal to a pixel.
In order to achieve these and other objects of the invention, an electro-luminescence panel according to one embodiment of the present invention includes a plurality of gate lines; a plurality of data lines arranged in such a manner to cross the gate lines; electro-luminescence cells provided at each intersection between the gate lines and the data lines; cell driving means, being provided at each of the electro-luminescence cells, for responding to a signal at the data lines to control a light quantity emitted from the electro-luminescence cells; a data driver for supplying a voltage pixel signal to the data lines; and a plurality of current drivers for responding to the voltage pixel signal to control a current amount going through the data lines from the cell driving means.
In the electro-luminescence display, the cell driving means includes a first current path for allowing a current to flow into the data line; and a second current path for allowing a current having several to tens of times the difference in quantity in comparison to a current amount going through the first current path to be applied to the electro-luminescence cell.
Each of the current drivers includes a transistor for responding to the voltage pixel signal to control a current amount flowing from the data line into a low voltage source.
The electro-luminescence display further includes a resistor connected between the transistor and the low voltage source.
In the electro-luminescence display, the low voltage source generates any one of a ground voltage and a negative voltage.
Each of the current drivers includes a resistor voltage divider connected between the data driver and the low voltage source to generate at least two divided-voltage signals; and at least two transistors connected, in series, between the data line and the low voltage source to respond to said at least two divided-voltage signals.
The electro-luminescence display further includes a resistor connected between said at least two transistors and the low voltage source.
In the electro-luminescence display, the low voltage source generates any one of a ground voltage and a negative voltage.
Each of the current drivers includes a current repeater, being connected between the data line and the low voltage source, for responding to the voltage pixel signal to control a current amount flowing from the data line into the low voltage source.
In the electro-luminescence display, the low voltage source generates any one of a ground voltage and a negative voltage. The current drivers are provided within the data driver. Alternatively, the current drivers are provided between the data driver and the cell driving means.
An electro-luminescence display according to another embodiment of the present invention includes a plurality of gate lines; a plurality of data lines arranged in such a manner to cross the gate lines; electro-luminescence cells provided at each intersection between the gate lines and the data lines; cell driving means, being provided at each of the electro-luminescence cells, for responding to a signal at the data lines to control a light quantity emitted from the electro-luminescence cells; a data driver for supplying a voltage pixel signal to the data lines; a gate driver for supplying a driving signal to the gate lines; a plurality of current drivers for responding to the voltage pixel signal to control a current amount going through the data lines from the cell driving means; and a plurality of pads provided at the current drivers to receive the voltage pixel signal.
In the electro-luminescence display, each of the current drivers includes a low voltage source having any one of a ground voltage and a negative voltage; a transistor provided between the data line and the low voltage source; and a resistor provided between the transistor and the low voltage source.
Each of the current drivers includes a low voltage source having any one of a ground voltage and a negative voltage; at least three resistors connected, in series, between the pad and the low voltage source; and at least two transistors connected, in series, between the data line and the low voltage source.
Each gate electrode of the transistors are connected between the resistors.
Each of the current drivers includes a low voltage source having any one of a ground voltage and a negative voltage; a resistor and a first transistor connected, in series, between the pad and the low voltage source; and a second transistor provided between the data line and the low voltage source.
In the electro-luminescence display, a source electrode and a gate electrode of the first transistor are electrically connected to each other, the gate electrode of the first transistor is connected to a gate electrode of the second transistor.
The electro-luminescence display further includes a third transistor provided between the second transistor and the data line.
In the electro-luminescence display, a gate electrode of the third is connected to the source electrode of the first transistor, and a drain electrode of the third transistor is connected to the gate electrodes of the first and second transistors.
The electro-luminescence display further includes a third transistor provided between the resistor and the first transistor; and a fourth transistor provided between the data line and the second transistor.
In the electro-luminescence display, a source electrode of the third transistor is connected to the gate electrodes of the first and second transistors.
The electro-luminescence display further includes a bias voltage source connected to gate electrodes of the third and fourth transistors to apply a driving voltage for driving the third and fourth transistors.
In the electro-luminescence display, the resistor is a variable resistor.